In-plane switching (IPS) is a display technology that has been used in a liquid crystal display (LCD) panel wherein twisted nematic (TN) or chiral nematic liquid crystals are used as a light-controlling medium. In particular, in a display panel where a nematic liquid crystal material known as the blue-phase light crystal (BPLC) is used to control the transmission of light, the structure of the electrodes plays an important role in controlling the driving voltage of the liquid crystal display and the contrast of the display.
In an IPS LCD panel using a nematic liquid crystal as the light controlling medium, the electric field that controls the alignment or configuration of the liquid crystal molecules is provided by two sets of protrusion electrodes alternately arranged on the lower substrate of the display. Typically, the display panel has two substrates and two polarizers with different polarization directions disposed on each of the substrates. The configuration of the liquid crystal molecules, along with the polarization directions of the two polarizers, controls the optical transmissivity of the display.
The performance of BPLC is largely determined by the BPLC materials. As known in the art, BPLC materials have three types: BP-I, BP-II and BP-III. It has been reported that BP-II exhibited a smaller hysteresis than BP-I and BP-II has a faster response time than BP-I. BP-III has greatly improved the response time in micro-second scale. These three BP types can be differentiated with the assembled structure of the double-twist cylinders (DTCs). The DTC assembly of the BP-I is body-centered cubic, BP-II is simple cubic and BP-III has an arbitrary orientation (amorphous). The sub-millisecond response time is a major advantage of BPLC. However, in order to stabilize BPLC, polymeric stabilization should be applied. Polymeric stabilization has revealed a major drawback of BPLC as it requires a large driving voltage of >100V in an IPS cell. To reduce the driving voltage, protrusion electrodes are used in the IPS cell to achieve a low driving voltage of 35V. However, it has been found that the coating on the protrusion electrodes is subject to peeling which results in a very low yield of the protrusion IPS.
To name a few, the following references are related background techniques to some extent.
Additional techniques for forming TFTs are disclosed in Chen, U.S. Pat. No. 7,652,285, which is assigned to AU Optronics Corp., the parent company of the assignee of the current application, and hereby incorporated by reference in its entirety. As disclosed in Chen, to form the channel of the TFT, the second metal layer is etched in order to open a portion of the second metal layer over the gate electrode and to separate the source region and drain region. This etching can be performed in multiple ways, including the back-channel etching process disclosed for example in Chen FIGS. 2A-2E and the etch stop process disclosed for example in Chen FIGS. 5A-5D and 6.
Chen discloses that TFT leakage currents may be reduced by adding a spacer layer formed at the sidewalls of the conductive doped amorphous silicon layer, isolating the conductive amorphous silicon layer from the insulating layer. Chen discloses that this spacer layer can be formed by oxidizing the exposed surface of the conductive amorphous silicon layer after the etching of the second metal layer is performed. Chen discloses that this surface may be oxidized by a number of different techniques, including oxygen plasma ashing and the use of ozone plasma in the presence of carbon tetrafluoride and sulfur hexafluoride gases.
As disclosed in Tsujimura et al., U.S. Pat. No. 6,689,629, which is assigned to AU Optronics Corp., the parent company of the assignee of the current application, and hereby incorporated by reference in its entirety, the wirings, such as the scan lines and signal lines of the array, are preferably comprised of a low-resistance material, such as aluminum or an aluminum alloy, so as to increase the speed with which the scan lines and signal lines operate. However, aluminum tends to be easily oxidized. For that reason, Tsujimura et al. discloses forming wirings as a two-layer structure, with a lower layer of aluminum, aluminum alloy or other low-resistance material, and an upper layer of molybdenum, chromium, tantalum, titanium, alloys thereof, or oxidation-resistant conductive materials.
Tsujimura et al. further discloses that the scan lines and signal lines contact connection pads, through which the array is connected to a driving system. Tsujimura et al. discloses forming dummy conductive patterns, situated between the connection pads and the pixel electrodes, but not in contact with any of the wirings on the substrate. By increasing the density of conductive material in a given area, the dummy conductive patterns can reduce etching undercut and improve the tapered shape of the wiring.